1h 25m ago
FPGA Design Verification Engineer
systemverilogc
🏢On-site
|United States of AmericaKey Skills:
FPGA Design Verification
SystemVerilog and UVM testbench development
C test development and hardware/software integration
Test plan development, functional coverage, and coverage closure
Universal Verification Component (UVC) development
FPGA verification from test planning through tape-out
Preferred Skills:
SpaceWire Protocol
DDR4 Memory Interfaces
SerDes Connectivity
Configuration, Control, and Telemetry Systems
🇬🇧 English