Director Design Engineering

About GlobalFoundries:

GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.

Summary of Role:

We are seeking an experienced and highly accomplished Director of Design Engineering to lead the development and execution of complex SoC programs across advanced semiconductor technologies. This leader will drive architectural execution, front-end design methodology, and cross-functional collaboration to deliver differentiated silicon solutions from concept through tape-out and productization.

Key Responsibilities:

Technical Leadership

• Lead the design and execution of complex SoC, AI/ML, networking, compute, or edge-processing products.
• Drive front-end development from architecture definition through RTL implementation, integration, synthesis, timing closure, and tape-out readiness.
• Establish and enforce best-in-class design methodologies, design quality metrics, and execution frameworks.
• Ability to use modern AI flows, methodologies for agile and fast design development
• Guide technical decisions involving performance, power, area (PPA), reliability, manufacturability, and product cost.
• Partner with architecture teams to evaluate new product concepts and technology feasibility.

Organizational Leadership

• Build, mentor, and lead high-performing design teams across multiple disciplines and geographies.
• Develop organizational capabilities spanning architecture, RTL, integration, verification, DFT, physical design, and silicon bring-up.
• Create a culture of technical excellence, accountability, innovation, and execution discipline.
• Drive talent acquisition, succession planning, and leadership development.

Cross-Functional Collaboration

• Work closely with Architecture, Verification, DFT, Physical Design, Package Design, Software, Product Engineering, Foundry, and Operations teams.
• Interface directly with customers, ecosystem partners, IP providers, EDA vendors, and technology partners.
• Align technical execution with business objectives, schedules, and product roadmaps.
• Lead reviews, executive communications, risk assessments, and program status reporting.

Technology Strategy

• Define and execute design strategies for advanced semiconductor technologies.
• Partner with foundries and ecosystem partners on technology enablement, PDK readiness, IP qualification, and silicon learning.
• Drive adoption of advanced design methodologies, low-power architectures, chiplet integration, 2.5D/3D packaging, and emerging AI-driven design flows.

Other Responsibilities:

• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Required Qualifications:

• Bachelor's, Master's, or Ph.D. in Electrical Engineering, Computer Engineering, or related field.
• 15+ years of semiconductor design experience with progressive technical and leadership responsibility.
• 8+ years of engineering management experience, including leadership of senior technical teams.
• Proven track record of delivering multiple successful ASIC/SoC tape-outs across advanced technology nodes
• Strong hands-on expertise in front-end design, including RTL design and integration Microarchitecture development Synthesis CDC/Lint DFT and test methodologies Timing closure Design verification collaboration
• Deep understanding of complete RTL-to-GDSII development flows.
• Demonstrated experience working on large-scale, complex SoC designs involving multiple IPs, subsystems, and cross-functional teams.
• Strong customer-facing and executive communication skills.

Preferred Qualifications:

• Experienced in delivering products on advanced technology nodes (7nm, 5nm, 3nm and beyond).
• Experience with AI/ML accelerators, compute platforms, networking, automotive, or high-performance computing products.
• Familiarity with advanced packaging technologies including chiplets, 2.5D, and 3D integration.
• Experience working directly with leading foundries and ecosystem partners.
• Understanding of low-power design methodologies, power management, and system-level optimization.
• Background in customer engagements, strategic partnerships, and technology roadmap development.

Expected Salary Range

$191,000.00 - $332,000.00

The exact Salary will be determined based on qualifications, experience and location.