RTL Integration Engineer

Position:
RTL Integration Engineer

Company:
Broadcom

Compensation:
USD 143,800.00 To USD 230,000.00

Location:
USA, San Jose

Employment type:
Full time

Short Summary:
The candidate will be required to perform IP integration and IP test/debug mode verification at the SoC level, involving RTL designs, linting, CDC and RDC analysis, synthesis, palladium modeling, and STA support.

Responsibilities:
- Perform IP integration and IP test/debug mode verification at the SoC level.
- Create RTL designs and perform linting.
- Execute CDC and RDC analysis for both RTL and gates.
- Handle synthesis, palladium modeling, and STA support.
- Strong debugging skills are highly required.

Requirement:
- Extensive knowledge of implementation, synthesis, and timing issues.
- Strong understanding of UVM and SystemVerilog.
- Deep familiarity with zero-delay and SDF simulations, including debugging failures.
- Proven experience in gate-level simulation (GLS).
- Familiarity with Clock Domain Crossing (CDC) analysis for RTL and gate-level designs.
- Highly desirable experience with simulation tools such as NCSim and VCS.
- Ability to work independently with minimal supervision.
- Experience working within a global team and a dynamic environment.
- Strong ability to quickly learn and adapt to new tools and methodologies.
- Excellent communication skills.

Benefits:
- Discretionary annual bonus.
- Competitive new hire equity grant and annual equity awards.
- Medical, dental, and vision plans.
- 401(K) participation including company matching.
- Employee Stock Purchase Program (ESPP).
- Employee Assistance Program (EAP).
- Company paid holidays, paid sick leave, and vacation time.
- Paid Family Leave and other leaves of absence.