Member of Technical Staff - Research Scientist

Architect Labs | Semiconductors

2h 23m ago

On-site

Full Time

United States of America

About Architect Labs

Architect is a frontier AI lab for custom silicon. We partner with frontier labs, clouds / neoclouds, physical AI companies, and advanced fabs to tape-out custom chips co-designed for next-generation AI workloads. Our goal is to compress end-to-end software to silicon timelines, and maximize intelligence per watt and per dollar for the world. We are a small exceptional team across silicon, systems, software and frontier AI. Our team have led research teams at nearly every frontier AI lab, and at some of the most complex SoCs in the world.

What You'll Do

As a Member of the Technical Staff at Architect Labs, you'll sit at the intersection of chip design and frontier AI translating deep hardware engineering expertise into agentic systems that can reason about, generate, and verify real silicon.

Research on self-improving harnesses to guide a swarm of agents work autonomously for days / weeks. Stay on top of SOTA frontier research.
Partner closely with the ML research, post-training, and infra teams to turn hardware domain expertise into reward signals, benchmarks, and training signals.
Build scalable and robust software stacks that transform ideas into production systems seamlessly.
Build evals and environments that tackle chip-design tasks, grounding model behavior in real hardware engineering work.
Move fast in a 0 to 1 environment: prototype, dogfood, break things, iterate. Translate ambiguous chip-design challenges into concrete agent capabilities that ship.

What We'd Like to See

Qualifications & Skills:

Background: PhD in Computer Science or a related field, or 3+ years of research experience at a frontier AI lab.
Agent Harness Research: Experience designing and improving agent harnesses, including orchestration, tool use, memory, feedback loops, and recovery mechanisms that enable agents to work autonomously on complex, long-horizon tasks.
Research Instinct: Ability to stay current with frontier AI research, critically assess new approaches, and turn promising findings into measurable improvements.
Software Engineering: Exceptional systems engineering. You architect and ship reliable, large-scale infrastructure that others build on, and you hold research code to production standards.
Builder Mindset: Ability to own ambiguous problems end to end, prototype quickly, and turn promising ideas into production systems. Pragmatic, resourceful, and comfortable moving fast.
Interest in Hardware: Excitement about applying frontier AI to chip design and a willingness to learn deeply from hardware engineers.

Strong candidates may also have experience with:

Research published at leading top conferences (ICLR, ICML, NeurIPS, etc).
Meaningful open-source contributions to coding agents, agent harnesses, or ML tooling, or building a harness from scratch.
Designing and deploying production multi-agent workflows and agents that run autonomously for days or weeks.
Building evaluations and benchmarks for complex engineering tasks.
Familiar with development reward signals, post-training or reinforcement learning methods for language models.
Familiar with training or serving transformer-based models and building high-performance, large-scale ML systems.

What We Offer

Competitive salary and meaningful equity stake
Fast-paced startup with autonomy and visible impact
Cutting-edge AI-driven chip design challenges

Required Languages

🇬🇧 English

About Architect Labs

What You'll Do

Research on self-improving harnesses to guide a swarm of agents work autonomously for days / weeks. Stay on top of SOTA frontier research.

Partner closely with the ML research, post-training, and infra teams to turn hardware domain expertise into reward signals, benchmarks, and training signals.

Build scalable and robust software stacks that transform ideas into production systems seamlessly.

Build evals and environments that tackle chip-design tasks, grounding model behavior in real hardware engineering work.

Move fast in a 0 to 1 environment: prototype, dogfood, break things, iterate. Translate ambiguous chip-design challenges into concrete agent capabilities that ship.

What We'd Like to See

Qualifications & Skills:

Background: PhD in Computer Science or a related field, or 3+ years of research experience at a frontier AI lab.

Agent Harness Research: Experience designing and improving agent harnesses, including orchestration, tool use, memory, feedback loops, and recovery mechanisms that enable agents to work autonomously on complex, long-horizon tasks.

Research Instinct: Ability to stay current with frontier AI research, critically assess new approaches, and turn promising findings into measurable improvements.

Software Engineering: Exceptional systems engineering. You architect and ship reliable, large-scale infrastructure that others build on, and you hold research code to production standards.

Builder Mindset: Ability to own ambiguous problems end to end, prototype quickly, and turn promising ideas into production systems. Pragmatic, resourceful, and comfortable moving fast.

Interest in Hardware: Excitement about applying frontier AI to chip design and a willingness to learn deeply from hardware engineers.

Strong candidates may also have experience with:

Research published at leading top conferences (ICLR, ICML, NeurIPS, etc).

Meaningful open-source contributions to coding agents, agent harnesses, or ML tooling, or building a harness from scratch.

Designing and deploying production multi-agent workflows and agents that run autonomously for days or weeks.

Building evaluations and benchmarks for complex engineering tasks.

Familiar with development reward signals, post-training or reinforcement learning methods for language models.

Familiar with training or serving transformer-based models and building high-performance, large-scale ML systems.

What We Offer

Competitive salary and meaningful equity stake

Fast-paced startup with autonomy and visible impact

Cutting-edge AI-driven chip design challenges