R&D Engineer

Position:
R&D Engineer IC Design 5

Company:
Broadcom

Compensation:
USD 143,800.00 To USD 230,000.00

Location:
USA, California, San Jose

Employment type:
Full time

Work Arrangement:
Not specified

Short Summary:
This individual will be a key member of the ASIC system-level verification team, responsible for developing complex verification environments, creating comprehensive test plans, and verifying high-performance network switch ASIC/FPGAs.

Responsibilities:
- Developing complex verification environments
- Creating comprehensive test plans
- Verifying high-performance network switch ASIC/FPGAs
- Hands-on implementation across every aspect of ASIC verification
- Collaborating closely with system architects, design engineers, and verification teams

Requirement:
- 8+ years of ASIC design/verification experience
- Bachelor's in Engineering
- Strong working knowledge of object-oriented programming (OOP) and modern ASIC verification flows (e.g., UVM/SystemVerilog)
- Complete mastery of Verilog for simulation
- Familiarity with ASIC design flows for deep sub-micron technologies
- Experience with networking protocols (e.g., Ethernet, PCIe, routing/switching) is a major plus
- Must have completed multiple ASIC tape-outs, with at least one project taken from initial concept through full production
- Fully comfortable with technical and business English

Benefits:
- Medical, dental and vision plans
- 401(K) participation including company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Company paid holidays, paid sick leave and vacation time
- Paid Family Leave and other leaves of absence